| 1 | Arys Carrasquilla-Batista, Gabriela Ortiz-Leon and Castalia Leiva-Cordero | Design of a rehabilitation device for hand grip and wrist mobility with an interactive interface and IoT capabilities |
| 2 | Arys Carrasquilla-Batista, Gabriela Ortiz-Leon and Johan Campos-Cerdas | Development of a Low-Cost Passive and Active Leg Rehabilitation Device with an Interactive Interface and IoT Capabilities |
| 4 | Ernesto Cristopher Villegas Castillo, Felipe Augusto da Silva, Carlos Silva Cardenas and Michael Glass | Early Safety Analysis of Software Test Libraries for Automotive SoCs based on Virtual Prototyping |
| 6 | Patrick Fath and Harald Pretl | A 494-nW 32768-Hz DCXO-Based Clock Generator with 613 ps Jitter for Biomedical Signal Acquisition |
| 7 | Ximing Fu, Yushi Zhou, Pierre Leduc and Kamal El-Sankary | Process-Insensitive Pseudo-Resistor-Based Bandpass Filter with Wide and Linear Frequency Tuning for Biomedical Applications |
| 14 | Thorben Schey, Khaled Karoonlatifi, Michael Weyrich and Andrey Morozov | Efficient Noise Injection Methodology for Sample and Hold Circuits in AMS Behavioral Models |
| 17 | Cristiane Barbosa Prado, Tiago Rodrigo Cruz, Max Feldman and Ivan Müller | Virtualization of Wireless Industrial Networks |
| 20 | Dinesh Reddy Munnangi and Aaron Stillmaker | Coarse-Grained vs. Fine-Grained Power Gating Techniques for RISC-V Processor |
| 23 | Riyanka Banerjee, Jay Nangia, Santosh Kumar and Jai Gopal Pandey | An Error-resilient Area-efficient Ultra-low-power 4-bit Flash ADC Design with Multi-Vt Transistors |
| 24 | Yufei Xing and Torsten Lehmann | A 3V High Gain Three-Stage Fully Differential Operational Amplifier in Flexible TFT Technology |
| 25 | Arshid Nisar, Lorena Anghel and Gregory Di Pendina | ATPG-Compliant Digital Modeling of MRAM for Cell-Aware Testing |
| 26 | Nicolás Urbano Pintos, Emanuel Trabes, Carlos Valderrama, Alaeddine Aajouj and Héctor Lacomi | Edge-Accelerated Monocular Depth Estimation: A Quantized U-Net on Kria KV260 for Real-Time Interior Scenarios |
| 28 | Anthony Leiva-Valverde, Fabricio Elizondo-Fernández, Luis G. Leon-Vega, Cristina Meinhardt and Jorge Castro-Godínez | A Quantitative Evaluation of Approximate Softmax Functions for Deep Neural Networks |
| 29 | Ramón Ulises Almada-Prieto, José Cruz Núñez-Pérez and Alán Rodrigo Díaz-Rizo | Chaos-based Hardware Trojan Covert Channel for Synchronized Chaotic Cryptosystems |
| 31 | Luis Humberto Pena Trevino, Eric Guerra Ribeiro, Lirida Naviner, Fady Abouzeid and Philippe Roche | Exploiting Timing-Power Causality for Post-Route Metric Prediction via Hierarchical Learning |
| 34 | Juan Sapriza, Beatrice Grassano, Alessio Naclerio, Filippo Quadri, Tommaso Terzano, David Mallasén, Davide Schiavone, Robin Leplae, Jérémie Moullet, Alexandre Levisse, Christoph Müller, Mariagrazia Graziano, Matias Miguez and David Atienza | HEEPidermis: a versatile SoC for BioZ recording |
| 35 | Rodrigo Wuerdig, Sergio Bampi and Georges Gielen | Exploring Spatial Redundancy for Boosting the Performance of Stochastic ADCs in Deep Nanometer CMOS |
| 37 | Canisio Barth, Osamu Saotome and Aline de Oliveira | Fractional Fourier Transform–Oriented Hardware Design for Normalized-Domain Chirp Synthesis |
| 40 | Lautaro Petrauskas, Bahman Kheradmand Boroujeni and Frank Ellinger | A Flexible Charge-Based Differential Capacitance Sensor Using IGZO TFTs for Insect Detection |
| 42 | Gabriel Maranhão, Deni Germano Alves Neto and Márcio Cherem Schneider | Current-controlled pseudo-resistor aimed at the TΩ range |
| 45 | Matheus Lemos, Clayton Farias, Paulo F. Butzen and José Azambuja | RISC-V Area-Optimized ASIC Design with a Multi-Height 7nm FinFET Standard Cell Library |
| 46 | David Mendoza and Alberto Sanchez | A Pipeline-Based Genetic Algorithm for time-critical systems |
| 47 | Henrique Bestani Seidel, Morgana Macedo Azevedo da Rosa, Rodrigo Lopes, Eduardo Da Costa and Rafael Soares | Ultra-Low-Power Approximate Discrete Haar Wavelet Transform for Muscle Fatigue Detection in sEMG Signal |
| 49 | Yuri Vaz, Júlio Mattos and Rafael Soares | FPGA Evaluation of Lightweight Cryptographic Algorithms: Efficiency and Security |
| 51 | Bruno Gambim, Fabricio Lorenzon, Sergio Bampi and Mateus Grellert | Power-Efficient LSTM Design Using Approximate Computing |
| 52 | Lucas Pereira do Amaral, Pedro Tauã Lopes Pereira, Mateus Grellert and Gabriel Luca Nazar | ASIC Design and Implementation of Low Latency and High Throughput FFT and iFFT |
| 54 | Ernesto Cristopher Villegas Castillo, Josie Esteban Rodriguez Condia, Juan David Guerrero Balguera, Felipe Augusto da Silva and Michael Glass | A Predictive Framework for Fault Vulnerabilities in Edge Hardware Accelerators |
| 55 | Massimo Bruschi, Jose Fuentes, Diego Garcia, Juan Rodriguez, Carlos Silva-Cardenas and Manuel Monge | Towards an Open-Source Wireless Power and Data Transfer Library for Implantable and Wearable Medical Devices |
| 56 | Rafael Cardoso, Morgana Macedo Azevedo da Rosa, Eduardo Da Costa and Rafael Soares | Design-Space Exploration of Approximate Adders in 5x5 Gaussian Filter Kernels |
| 58 | Lucas Santana, Anderson Araujo and Edward Ordonez | Skin Lesion Classification in Mobile Applications and Edge Devices: A Systematic Review |
| 60 | Anderson Araujo, Lucas Santana and Edward Ordonez | Comparative Analysis of Benchmarks in Machine Learning and Deep Learning |
| 61 | Nicolas Gabriel Cotti, Lucas Liaño, Felix Palumbo, Andrés Kasulin, Juan Pablo Goyret and Mariano Garcia Inza | Polysilicon heater control for fast and stable temperature-dependent measurements |
| 63 | Rafael Gomes, Mateus Giesbrecht and Fabiano Fruett | Study and Implementation of a Partial Discharge Detection System: An Optimized Front-End Circuit for Continuous Monitoring |
| 64 | Ettore Napoli | VLSI Implementation of AlphaEvolve Based Rank-48 Algorithm for 4×4 Real-Valued Matrix Multiplication |
| 71 | Julián Evia, Germán Fierro and Fernando Silveira | Low Noise Current Sources for Closed Loop Neurostimulation |
| 72 | Kendall Rivera-Solano, Luis G. Leon-Vega, Erick Carvajal-Barboza and Jorge Castro-Godínez | Machine Learning-Based Error Estimation for Efficient Approximate Logic Synthesis |
| 73 | Lucas Fraga and Cláudio Diniz | Intra-Frame Prediction Hardware Architecture for VVC Exploring Approximation and Reuse |
| 74 | Jhordan Pila, Edgar Haro, Alberto Sánchez and Marcelo Pozo | Development of a HIL-Real Time Simulator for Single-Phase Line-Commutated AC-DC Converters |
| 76 | Ali Ibrahim, Hiba Al Youssef, Orazio Aiello and Roberto La Rosa | On-Device Intelligence for Energy-Autonomous Wireless Sensor Nodes: A Benchmarking Study on Energy and Complexity |
| 78 | Mariana Siniscalchi and Carlos Galup-Montoro | Dynamic Model of a Six-Transistor Schmitt Trigger in Weak Inversion |
| 79 | Francisco Veirano, Germán Fierro, César Azambuya, Mateo Guerrero and Gonzalo Hernández | Efficient Hardware Architecture for Artifact Cancellation in Closed-Loop Neurostimulators |
| 81 | Vicente Veiga, Fabio Benevenuti, Ulisses Maffazioli, Arthur Ely, Eduardo Marañon, Antonio Beck, Jose Rodrigo Azambuja and Fernanda Kastensmidt | Power-Performance Analysis of a Softcore RISC-V SoC with CNN Accelerators for In-Orbit Computing |
| 82 | Paulo Realpe Muñoz, Jorge Erazo Aux and Jaime Velasco Medina | High-Reliability True Random Number Generator with Real-Time Entropy Monitor |
| 83 | Édney Freitas, Alexandre Aragão, Bruno Sanches, Felipe Costa, Andrés Hurtado and Wilhelmus Van Noije | A Low-Cost Portable Stepped-Frequency Ultra-Wideband SDR-based MWI System for Breast Cancer Detection |
| 87 | Henrique Bestani Seidel, Morgana Macedo Azevedo da Rosa, Rodrigo Lopes, Sérgio Almeida, Eduardo Da Costa and Rafael Soares | Energy-Efficient VLSI Exponential Function Combining a Fourth-Order Maclaurin Series and Horner's Method |
| 88 | Samuel Wachholz, Leonardo Silveira, Leonardo Antonietti, Morgana Macedo Azevedo da Rosa, Sérgio Almeida, Eduardo Da Costa and Rafael Soares | A Cross-Layer Single-Cycle Approximate Fixed-Point Square Root Unit |
| 90 | Diego Penaflor and Jimmy Tarrillo | FPGA-Based file level AES-encryption system with volatile physical key |
| 96 | Yuya Takahashi, Shunya Watanabe, Keito Yuasa and Atsushi Shirane | An S-band VGA with Low Phase Variation Utilizing a Cross-Coupled Neutralization and LC resonance for Direct-to-Device Satellite Communication |
| 99 | Luis Eduardo Mendes, Fabio Benevenuti, Antonio Carlos Beck, Jose Rodrigo Azambuja and Fernanda Kastensmidt | Implementing a Dual RISC-V System-on-Chip Chiplet with Advanced Interface Bus |
| 100 | Leandro Tavares, Ruhan Conceição, Wen-Hsiao Peng, Luciano Agostini, Marcelo Porto and Guilherme Corrêa | Assessing the Domain Gap: Evaluation of STDF for Enhancing Videos Compressed by Neural Codecs |
| 101 | Elias de Almeida Ramos, Augusto Gouvêa Weber, Fernando Pedrazzi Pozzer, Ewerton Santos, Mateus Rutzig, Joao Baptista Martins and Ricardo Reis | A New Error Detector and Corrector Based on the Chaos of Boolean Sequences |
| 103 | Adson Duarte, Enthony Bohm, Guilherme Correa, Attilio Fiandrotti, Bruno Zatt and Daniel Palomino | CNN-Driven Fast Intra-Mode Decision Solution for the Angular Modes in the VVC Standard |
| 107 | Patricia Gonzalez-Guerrero, Panagiotis Zarkos, Carl Grace and George Michelogiannakis | A Novel 1-bit Adder Cell and Filters for Oversampling Superconducting ADCs |
| 112 | Allan Schuch, Gustavo Rehbein, Vitor Costa, Daniel Palomino and Marcelo Porto | A GPU Hardware Encoder Tools and Coding Efficiency Analysis on Point Cloud Compression |
| 113 | Rafael Knust, Thiago Brito, Fernanda Oliveira and Fabián Olivera | Evolutionary Optimization for Low-Voltage, Wide-Temperature Range SRAM Cell Designs |
| 114 | Felipe Gerha Barbosa Otaviano da Silva, Matheus Guido de Oliveira, Marcos Henrique Mansano Vogel, Fabio Kawaoka Takase, Bruno Luis Soares Lima and Lucia Akemi Miyazato Saito | Comparing MQTT and gRPC protocols performance in a IoT smart campus cybersecurity scenario |
| 115 | Lucas Ribeiro and Ivan Silva | Energy-Efficient Cache Configuration Prediction Using Machine Learning on Basic Blocks |
| 117 | Lucas X. de Moura and Daniel M. Muñoz | HiLDA: High Level Design Application |
| 118 | Rodrigo Feldens, Sergio Bampi and Felipe Sampaio | Complexity vs. Prevalence Assessment for Prediction Steps for VVenC Encoding Profiles |
| 120 | Cristobal E. Perez-Ramirez, Amelia E. Pizarro and Philip Vasquez-Iglesias | On the effects of numeric precision in a modified Starfish Optimization Algorithm |
| 121 | Francisco Júnior, Ivan Silva and Ricardo Jacobi | Energy-Efficient Mappings in the Athena CGRA |
| 124 | Mirella M. de O. Carneiro, Victor R. R. de Oliveira, Fernanda D. V. R. Oliveira, Fernando A. P. Barúqui, José Gabriel R. C. Gomes, Fabian Olivera and Milena F. Pinto | Second Generation Current Conveyor Sizing Optimization Employing Genetic Algorithm with Simulator in the Loop |
| 125 | Diego Maran de Mattos, Paulo César Comassetto de Aguire, Lucas Compassi Severo and Alessandro Gonçalves Girardi | Low-Power CMOS DC-DC Converter for Artificial Light Energy Harvesting |
| 126 | Julián Romero, Jeanpaull Valencia, Jeison Acevedo and Javier Ardila | A 20 Gb/s Continuous Time Linear Equalizer with a Gain-Enhanced and Cross-Coupled Pair Technique for a SerDes Interface in 28 nm |
| 127 | Andrés Tarazona Moreno, Sergio Oliveros Sepúlveda, Jorge Angarita-Pérez and Javier Ardila | Implementation of Dynamically Adjusted Load Technique for Reducing Start-Up Time in a 32.768 kHz Crystal Oscillator in 28 nm CMOS Process |
| 129 | Xianda Li, Paul Beckett and Ranjith Unnithan | A Novel 0.5V Gm-Enhanced Bulk-Driven OTA in 65nm CMOS |
| 130 | Gilberto Kreisler, Luis Carlos Linares, Daniel Palomino, Bruno Zatt, Attilio Fiandrottir and Guilherme Corrêa | Low-Complexity Spatio-Temporal Deformable Fusion for Compressed Video Quality Enhancement |
| 131 | Ilan Sabaj, Santiago Bernárdez, Ignacio Valettute and Mariana Siniscalchi | Current-Starved Inverter Cell Design Trade-Offs for Single Capacitively Coupled Ring VCOs |
| 132 | Sergio Limachi and Silma Alberton Corrêa | Linking Materials Synthesis and Embedded Systems: IoT-Controlled Platform for MoS₂ CVD |
| 134 | Patrick Rosa, Daiane Freitas, Leonardo Müller, Guilherme Correa and Daniel Palomino | Machine Learning-Driven Fast Full-Search Filter Decision in AV1 Fractional Inter-Frame Prediction |
| 136 | Vanessa Aldrighi, Denis Maass, Ruhan Conceição, Wen-Hsiao Peng, Marcelo Porto and Luciano Agostini | A FHD@30fps Hardware Design for WSiLU Activation Function for Neural Video Coding |
| 139 | Victor Ramon França Bezerra de Souza and Lucas Lucas Bernardino | Electrocardiogram Synthesis from Photoplethysmogram Signals Through Generative Adversarial Networks |
| 140 | Enzo Costa, Claudenir Filho, Cesar Prior, Martim Presser, Renan de Oliveira, Leonardo de Oliveira and João Martins | Logic Synthesis and Characterization of a 22 nm Reconfigurable CIC Decimation Filter |
| 141 | Hernan Mendez, Philip Vasquez-Iglesias, Julio Rodriguez, David Zabala-Blanco, Diego Martinez, Cristobal E. Perez-Ramirez and Amelia E. Pizarro | Cheetah Optimizer-Driven Hyperparameter Tuning of Multilayer Extreme Learning Machines for Heart Disease Detection |
| 142 | Francisca Donoso, Nelson Salvador, Christian Rojas, Jorge Marin and Gonzalo Carvajal | Design of a PI-controller ASIC for a Multilevel Converter using High-Level Synthesis and LibreLane |
| 143 | Mohsen Asghari, Sebastien Le Beux and Ron Mankarious | Lightweight yet Powerful: Optimized Tightly Coupled Hyperdimensional Computing Accelerators |
| 144 | David Jason Cruz Santiago and Habib M. Ammari | An Efficient and Cost-Aware Approach to Hole Restoration in Heterogeneous Wireless Sensor Networks Using Geometric Inversion |
| 145 | Franklin Sales de Oliveira, Rogerio Cassanta, Iago Storch and Luciano Agostini | FastMIP-360: A Lightweight Decision Tree for Pruning VVC MIP in 360° Videos |
| 146 | Augusto Vassoler, Fakhrul Zaman Rokhani and Mateus Grellert | Design and Synthesis of a Scaled Dot Product Accelerator with an AXI4-Stream Interface |
| 147 | Gonzalo Carreño, Amelia E. Pizarro, Philip Vasquez-Iglesias, Cristobal E. Perez-Ramirez, Nicolás A. Reyes-Reyes and Axel Quinteros | Ensemble Learning for the Prediction of Air Pollutants PM2.5 and PM10 During the Critical Episode Management Period in Talca, Chile |
| 149 | Ronny Alberto Rueda Mendez, Juan Sebastian Caviedes Bernal and Johan Sebastian Eslava Garzon | Strategies for Scaling Up RL-Based Multiplier Architectures to Higher Bit-widths |
| 150 | Diana Maldonado, Kevin Patiño and Johan Sebastián Eslava | Design, Implementation and Verification of an Open-Source ASIC for Grayscale and Sobel Edge Detection |
| 155 | Rodrigo Apaza-Huanca, Karel-Walter Gomez-Orellana, Juan-Carlos Paredes-Condori, Carlos-Esteban Gironda-Lagrava, Hugo-Orlando Condori-Quispe and Renan Garcia-Escarzo | A Low-Cost, SDR-Based Testbed for Multi-Domain Characterization of 5G NR Amplifier Chains |
| 156 | Karel-Walter Gomez-Orellana, Berthyn-Rodrigo Tiñini-Chuquimia, Rodrigo Apaza-Huanca, Juan-Carlos Paredes-Condori, Carlos-Esteban Gironda-Lagrava and Hugo-Orlando Condori-Quispe | Fuzzy-Integral Control for Adaptive Power Management in 24 GHz mmWave 5G Transceivers |
| 162 | Vanessa Botinelly, Filipe Caetano, Osamu Saotome and Lucas Compassi-Severo | A Tradeoff-Based Sizing Methodology for Low-Power ULV RF LNTAs using LUT Approach |
| 164 | Francois Rivet, Mohamed Amine Hamoura, Sami Ouabrk, Nour Hello and Emilio Calvanese Strinati | Joint Hardware–Waveform Co-Design of Semantic RF Transceivers for 6G Communications |
| 165 | Malak Bouaamri, Fadel Mohsen, Imadeddine Bendjeddou, Manuel Barragan, Andreia Cathelin and Sylvain Bourdel | A Comprehensive Review of State-of-the-Art Harmonic Rejection Techniques in N-Path Mixers |
| 167 | Rafaella Fiorelli | Exploring Charge-Based MOSFET Compact Models with ACM-2 as a Design-Oriented Paradigm |
| 168 | David Freidenson Bejar, Mario Andrés Raffo Jara and Ernesto Cristopher Villegas Castillo | Validation of the NVDLA Architecture via AWS-Based FPGA Co-Simulation Using the AlexNet Model |
| 170 | Thuy Pham Trong, Dang-Kièn Germain Pham, Reda Mohellebi, Pierre Almairac, Carolina Pedrosa and Patricia Desgreys | A Bandwidth-Aware Figure of Merit for Behavioral Modeling of Power Amplifiers |
| 171 | Deni Germano Alves Neto, Márcio Cherem Schneider, Manuel J. Barragan, Sylvain Bourdel and Carlos Galup-Montoro | Benchmarking the symmetry of MOSFET compact models with emphasis on ACM2 |
| 172 | Virgile Colrat, David Gaidioz, Andrés Asprilla, Frédéric Paillardet, Andreia Cathelin and Yann Deval | Sequential Dual-Loop Digital and Analog PLL Synthesizer for Fast-Locking IoT applications in 18nm FD-SOI CMOS |
| 173 | Catalin Andrei Dobrin, Deni Germano Alves Neto, David Gaidioz, Philippe Cathelin, Sylvain Bourdel and Manuel J. Barragan | RF Design-Oriented ACM Model Generation Using Parametric Test and Machine Learning Regression in 28nm FD-SOI CMOS technology |
| 174 | Sara Awada, Hiba Al Youssef, Orazio Aiello, Roberto La Rosa and Ali Ibrahim | When Hardware-NAS Meets Knowledge Distillation to Reduce Energy Consumption in Intelligent Sensing Systems |
| 176 | Léopold Van Brandt, Grégoire Brandsteert and Denis Flandre | On the Excitability of Ultra-Low-Power CMOS Analog Spiking Neurons |
| 177 | Léopold Van Brandt, Noémie Bidoul, Thomas Ratier, Xi Zeng, Jean-Charles Delvenne and Denis Flandre | Experimental Demonstration of a Temperature-Sensitive VO2 Memristor-based Spiking Circuit in Stochastic Bursting Regime |
| 178 | Mohammad Hasan Ahmadilivani, Josie Esteban Rodriguez Condia, Maksim Jenihhin and Matteo Sonza Reorda | Investigating the Impact of Soft Errors in GPU-accelerated Sparse DNNs |
| 179 | Loai Salem | Analytical Modeling of Inductor-Free Two-Way N-Path Switched-Capacitor Power Dividers |
| 180 | Juan-David Guerrero-Balaguera, Robert Limas Sierra, Gustavo Vilar de Farias, Sergiu-Mohamed Abed, Ahmet Cagri Bagbaba and Josie Esteban Rodriguez Condia | Analyzing Hardware Accelerators’ Reliability: From Design Exploration to Fast Evaluation with Hyperscalers |
| 181 | Shunya Watanabe, Yuya Takahashi, Keito Yuasa and Atsushi Shirane | An S-band High-Resolution Vector-Sum Phase Shifter for Direct-to-Device Satellite Communication |
| 182 | Arthur Cruz Morbach, Sandro Binsfeld Ferreira, Filipe Baumgratz and Robert Staszewski | Suitability Analysis of Mixer-First Discrete-Time RF Receivers |